1. Field of the Invention
The present invention relates to a method and an apparatus for modular multiplication of a multiplicand by a multiplier using a modulus, and, in particular, to modular multiplication using a multiplication-lookahead method and a reduction-lookahead method.
2. Description of Prior Art
Cryptography is one of the major applications for modular arithmetic. An essential algorithm for cryptography is the known RSA algorithm. The RSA algorithm is based on a modular exponentiation which may be represented as follows:C=Md mod(N).
Here, C is an encrypted message, M is a non-encrypted message, d is the secret key, and N is the modulus. The modulus N is usually created by multiplying two prime numbers p and q. The modular exponentiation is split into multiplications by means of the known square-and-multiply algorithm. To this end, the exponent d is split into powers of two, so that the modular exponentiation may be split into several modular multiplications. In order to be able to implement the modular exponentiation efficiently in terms of computation, the modular exponentiation is therefore split into modular multiplications, which may then be split into modular additions.
DE 3631992 discloses a cryptography method wherein modular multiplication may be accelerated using a multiplication-lookahead method and using a reduction-lookahead method. The method described in DE 3631992 C2 is also referred to as a ZDN method and will be described in more detail with regard to FIG. 8. After a starting step 900 of the algorithm, the global variables M, C and N are initialized. The aim is to calculate the following modular multiplication:Z=M*C mod N.
M is referred to as the multiplier, where C is referred to as the multiplicand. Z is the result of the modular multiplication, whereas N is the modulus.
Hereupon, different local variables are initialized, which need not be explained in further detail. Subsequently, two lookahead methods are applied. In the multiplication-lookahead method GEN_MULT_LA, a multiplication shift value sZ as well as a multiplication-lookahead parameter a are calculated using different lookahead rules (910). Hereupon, the current content of the Z register is subjected to a left-shift operation by sZ digits (920).
Essentially in parallel therewith, a reduction-lookahead method GEN_Mod_LA (930) is performed to calculate a reduction shift value sN and a reduction parameter b. In step 940, the current content of the modulus register, i.e. N, is shifted to the left and right, respectively, by sN digits so as to create a shifted modulus value N′. The central three-operands operation of the ZDN method takes place in step 950. Here, the intermediate result Z′ is added, after step 920, to multiplicand C, which is multiplied by the multiplication-lookahead parameter a, and to the shifted modulus N′, which is multiplied by the reduction-lookahead parameter b. Depending on the current situation, the lookahead parameters a and b may have a value of +1, 0 or −1.
A typical case is for the multiplication-lookahead parameter a to be +1, and for the reduction-lookahead parameter b to be −1, so that the multiplicand C is added to a shifted intermediate result Z′, and so that the shifted modulus N′ is subtracted therefrom. a will have a value equal to 0 if the multiplication-lookahead method allows more than a preset number of individual left shifts, i.e. if sZ is larger than the maximum admissible value of sZ, which is also referred to as k. In the event that a equals 0 and that Z′ is still fairly small due to the preceding modular reduction, i.e. to the preceding subtraction of the shifted modulus, and that Z′ is, in particular, smaller than the shifted modulus N′, no reduction need take place, so that parameter b equals 0.
Steps 910 to 950 are performed for such time until all digits of the multiplicand have been processed i.e. until m equals 0, and until a parameter n also equals 0, which parameter indicates whether the shifted modulus N′ is even larger than the original modulus N, or whether further reduction steps must be performed by subtracting the modulus from Z despite the fact that all digits of the multiplicand have already been processed.
Eventually it will also be determined whether Z is smaller than 0. If this is so, modulus N must be added to Z so as to achieve a final reduction, so that eventually the correct result Z of the modular multiplication is obtained.
In a step 960, the modular multiplication by means of the ZDN method is terminated.
The multiplication shift value sZ as well as the multiplication parameter a, which are calculated by means of the multiplication-lookahead algorithm in step 910, result from the topology of the multiplier as well as from the lookahead rules used which are described in DE 3631992 C2.
The reduction shift value sN and the reduction parameter b are determined, as is also described in DE 3631992 C2, by comparing the current content of the Z register with a value ⅔×N. The name of the ZDN method is based on this comparison (ZDN=Zwei Drittel N=two thirds of N).
The ZDN method, as is depicted in FIG. 8, traces the modular multiplication back to a three-operands addition (block 950 in FIG. 8), wherein the multiplication-lookahead method and, hand in hand therewith, the reduction-lookahead method, are used for increasing the calculating-time efficiency.
The reduction-lookahead method, which is performed in block 930 of FIG. 9, will be explained below in more detail with reference to FIG. 8. Initially, in a block 1000, a reservation for the local variables, i.e. for the reduction-lookahead parameter b and the reduction shift value sN, is performed. In a block 1010, the reduction shift value sN is initialized to zero. Hereupon, the value ZDN, which equals ⅔ of modulus N, is calculated in a block 1020. This value which is determined in block 1020 is stored on the crypto-coprocessor on a register of its own, i.e. the ZDN register.
It is then determined, in a block 1030, whether the variable n equals 0, or whether the shift value sN equals −k. k is a value defining the maximum shift value specified by the hardware. In the first run, block 1030 is answered by NO, so that in a block 1040, parameter n is decremented, and so that in a block 1060, the reduction shift value is also decremented by 1. Then, in a block 1080, the variable ZDN is redefined, i.e. is defined as half its value, which may readily be achieved by a right-shift of the value found in the ZDN register. It is then established, in a block 1100, whether the absolute value of the current intermediate result is higher than the value found in the ZDN register.
This comparative operation performed in block 1100 is the central operation of the reduction-lookahead method. If the question is answered with YES, the iteration is terminated, and the reduction-lookahead parameter is defined, as is represented in block 1120. If, however, the question to be answered in block 1100 is answered with NO, an iterative backward jump is performed to examine the current values of n and sN in block 1030. If block 1030 is answered with YES at some point in the iteration, the process jumps to a block 1140, wherein the reduction parameter b is set to zero. In the three-operands operation represented in block 950 in FIG. 8, the result is that no modulus is added or subtracted, which means that the intermediate result of Z was so small that no modular reduction was necessary. In a block 1160, the variable n is then redefined, the reduction shift value sN being eventually calculated in a block 1180, which reduction shift value sN is needed, in a block 940 of FIG. 8, to perform the left shift of the modulus so as to achieve a shifted modulus.
In blocks 1200, 1220 and 1240, the current values of n and k are finally examined for further variables MAX and cur_k so as to examine the current definition of the N register to ensure that no register overshoot takes place. The further details are not relevant to the present invention but are described more fully in DE 3631992 C2.
The ZDN algorithm essentially consists of the following steps:    1. Calculating the multiplication shift value sZ and the multiplication-lookahead parameter a.    2. Shifting the content of the z register by sZ digits, i.e. multiplying the intermediate result of the previous iteration step by a factor of 2sZ.    3. Calculating the reduction shift value sN and, optionally, the reduction-lookahead parameter b.    4. Shifting the content of the N register by sN digits, i.e. multiplying the current modulus by a factor of 2sN.    5. Performing the three-operands addition to obtain an updated intermediate result Z in accordance with the following defining equation 2sZ Z+a c+b 2sN N.
Depending on the multiplication-lookahead algorithm, it is necessary to calculate multiplication-lookahead parameters (a) and reduction-lookahead parameters (b). As is known, these parameters may take on values from −1.0 to +1.
Depending on the implementation, the reduction shift value sN may be calculated using an auxiliary shift value si, as will be explained with reference to FIGS. 3a to 3c. For calculating the reduction shift parameter sN, in this case, the auxiliary shift value si, i.e. the difference between the most significant bits of the current Z-register entry and the current modulus-register entry, is initially calculated, whereupon the reduction shift values sN will be calculated from the difference between the multiplication shift value sZ and the auxiliary shift value si.
As is known from DE 3631992 C2, the time required to calculate a modular multiplication M C mod N is proportional to a third of the length of the multiplier M in terms of bits. This means that the number of cycles needed for calculating the modular multiplication equals L(M)/3.
Even though a substantial acceleration of the modular multiplication may be achieved using the multiplication-lookahead method and the reduction-lookahead method conducted in parallel, there is still a desire to accelerate modular multiplication even more, which becomes more important especially if the length of the multiplier is ever-increasing, in terms of bits, which may lead to improved security of the algorithm, especially in the RSA algorithm.
In addition, rapid calculation of modular multiplication is important not only, for example, with chip cards, where the level of acceptance of an encryption concept is also dependent on the amount of time a user must wait, but it is also important in so-called trusted centers, where, e.g., 1000 RSA encryptions are to be performed per second. Such trusted centers can be found wherever a security server has to serve a plurality of client queries.